1. Field of the Invention
The present invention relates to a D/A converter for converting a plurality of digital signals to analog signals.
2. Description of Related Art
To improve D/A conversion accuracy, some conventional D/A converters include a weighting cell for D/A converting a few lower-order bits of a digital signal in addition to a current matrix cell for D/A converting a few higher-order bits of the digital signal (see, Relevant Reference 1 below).
Incidentally, a digital signal processing IC sometimes switches analog signals to be output by switching an internal mode in accordance with its used conditions. In this case, the digital signal processing IC must be equipped with D/A converters corresponding to the maximum number of analog signals to be output simultaneously.
For example, the digital signal processing IC switches between two analog output signals such as (Y output, C output), three analog output signals""such as (R output, G output, B output) and (Y output, U output, V output), and four analog output signals such as (Y output, C output, Y/C output, Y/C output) in response to the internal mode.
Relevant Reference 1: Japanese patent application laid-open No. 6-152424/1994 (paragraph No. [0040] to [0055], and FIG. 1), which is incorporated herein by reference.
With the foregoing configuration, the conventional D/A converter can improve the D/A conversion accuracy. However, it has a problem of being unable to convert a plurality of digital signals into analog signals simultaneously.
Accordingly, the digital signal processing IC must be equipped with a plurality of D/A converters, which presents a problem in that a layout area of the digital signal processing IC increases.
The present invention is implemented to solve the foregoing problem. It is therefore an object of the present invention to provide a D/A converter capable of converting a plurality of digital signals into analog signals simultaneously in accordance with used conditions.
According to one aspect of the present invention, there is provided a D/A converter including a current matrix cell, N weighting cells, a control circuit, and an output circuit, where N is an integer equal to or greater than two. The control circuit divides the current matrix cell in accordance with the number M of digital signals to be D/A converted, where M is an integer equal to or less than N, and supplies the current matrix cell after the division with specified bits constituting the M digital signals. The control circuit also supplies only the M weighting cells out of the N weighting cells with the remaining bits of the individual M digital signals. M analog signals are obtained by adding the M currents the current matrix cell produces and the M currents the M weighting cells produce. The D/A converter offers an advantage of being able to convert M digital signals to M analog signals simultaneously, in which M is variable in accordance with used conditions.